The present invention relates to processes for forming a trench in a semiconductor material and to integrated circuit (IC) and memory devices that include such trenches.
In the semiconductor industry, trenches are commonly formed in semiconductor materials such as silicon wafers, as an initial step in the formation of various devices used in integrated circuits, for example trench DMOS, capacitors for memory and isolation for IC. Trenches are typically formed by applying a mask, such as photoresist, to the surface of the semiconductor material, and etching the portion of the semiconductor material that is not covered by the mask to remove some of the exposed semiconductor material. The length and width of the trench are defined by the dimensions of the open area in the mask, while the depth of the trench is generally defined by the etch parameters.
The resulting trenches often have sharp top and bottom corners, as shown in FIG. 1. (The term "top corner", as used herein, refers to the top edges 10 of the trench 12 at the junction of the top surface 11 of the semiconductor material and the sidewalls 16 of the trench 12, while the term "bottom corner" refers to the corners 14 that are at the junction of the sidewalls 16 of the trench 12 and the floor 18 of the trench 12.) These sharp comers are undesirable for several reasons. For example, when a gate oxide is formed on the surface of the trench, the oxide will tend to form unevenly, with a thinner oxide layer at the sharp comers. This uneven oxidation can result in high electric field, early gate oxide rupture, and high leakage current. Additionally, sharp corners tend to cause defects in the integrated circuit.
Thus, there has been an ongoing effort in the semiconductor industry to provide a trench-forming process that would form smoothly rounded top and bottom comers, as shown in FIG. 1a. While it has been possible to obtain some rounding of the bottom comers by controlling etch chemistry and parameters, top corner rounding has remained difficult to achieve.